实现了简单的电子表功能，是24小时，用VHDL所编写的，quartus ii 7.2...

《FPGA数字信号处理与工程应用实践附光盘》配套源代码(FPGA DSP and their applications with verilog HDL)

verilog语言写的一个四层电梯程序，有优先级的判断。(verilog language of a four-story elevator procedures to determine priority.)

这是兼容的8051 VHDL CPU实现，应该不算侵权吧。 上帝保佑！-This is compatible CPU 8051 VHDL, it is not a tort. God bless!

morris mano basic vhdl code in ise

自动计算fir滤波器系数的工具，不妨一试(Automatic calculation of filter coefficients fir tools, try)

基于FIR滤波器的LMS自适应算法的FPGA实现,verilog语言(FIR filter based on LMS adaptive algorithm on FPGA, VHDL language)

16点FFT，简单易理解，适合初学者了解(16 point FFT, simple and easy to understand, suitable for beginners to understand)

如何编写测试文件，，test bench的编写方法和是列，，总结的非常好的东西(how to code test bench in verilog)

1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT

本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)