使用Xilinx3S400开发的钢板检测算法中心化算法，通过测试。

基于QuartusII环境下的地铁自动售票系统(Subway auto ticketing system based on QuartusII)

Based on the verilog such as frequency meter accuracy, except for measuring frequency can also measure pulse width of empty measure than 32 counts of data through the simulation SPI serial output to SCM processing and display

Verilog HDL 写的SVPWM 算法的实现，使用的是altera 风暴系列的FPGA，占用资源1w+逻辑宏单元(Verilog HDL ，SVPWM)

软件开发环境：ISE 7.1i 仿真环境：ISE Simulator 1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器； 2. 工程在project文件夹中，双击traffic.ise文件打开工程； 3. 源文件在rtl文件夹中，traffic.v为设计文件，traffic_tb.tbw是仿真波形文件； 4. 打开工程后，在工程浏览器中选择traffic_tb.tbw，在Process View中双击“Simulation Behavioral Model”选项，进行行为仿真，即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ISE Simulator1. Realize this instance through the ISE Simulator tool to achieve a total of eight lights in both directions of traffic lights controller 2. Works project folder, double-click traffic.ise Open the project document 3. rtl source file in the folder, traffic.v for design documents, traffic_tb.tbw is the simulation waveform files 4. to open a project, the project browser, select traffic_tb.tbw, in the Process View in the double hit

伪随机m序列VHDL代码，生成多项式为1+x+x^7 (203)，包括代码文件.vhd和模块文件.bsf以及仿真波形，可直接添加到工程中使用。

verilog2000更新部分，请对照前一个标准。加入了一些新的支持-verilog2000 update, a former control standards. The inclusion of some new support

max_plus开发的 有max_plus就可以直接运行的交通灯制作 用vhdl语言编写的-max_plus development of max_plus can direct the operation of traffic lights produced by VHDL language

说明：  通过MATLAB产生单脉冲信号的数据，存储下来作为verilog代码实现的DDS的数据源，用于验证DA数据的ddio的调试是否有问题。(The data of monopulse signal generated by MATLAB is stored as the data source of DDS implemented by Verilog code to verify whether the ddio debugging of DA data is problematic.)

16次迭代的CORDIC算法，精度很高，可应用于计算反正切值(16 iterations of the CORDIC algorithm, high accuracy, can be applied to calculate arctangent)

用VHDL实现的DDS逻辑，大家可以参考下-DDS achieved using VHDL logic, we can refer to the following