RAM控制的VHDL实现 真的很有用

频率计 测量范围1-100MHz 测量阈值0.1s 计数部分为FPGA/CPLD 语言VHDL 显示部分为51 单片机加八位数码管 语言C(Frequency meter Measuring range 1-100 MHZ Measure threshold is 0.1 s Count part of FPGA/CPLD Language VHDL Display part of 51 MCU with eight digital tube Language C)

FSK编码器和译码器,有需要的朋友可以看看！(FSK encoder and decoder, there is a need friends can see!)

说明：  使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)

使用FPGA控制永磁同步电机的代码，实现对永磁同步电机的控制功能。(Motor control by using FPGA)

很好的学习FPGA嵌入式的资料！适合初学者和工程师参考！(Good learning FPGA embedded information! Suitable for beginners and engineers reference!)

agilex fpga description

说明：  自适应滤波器算法LMS ，的FPGA实现，采用VERILOG实现。(LMS, an adaptive filter algorithm, is implemented on FPGA and VERILOG.)

基本功能的cpu，自定义内存内容~了解CPU运作原理~(design of cpu,VHDL environment~)

FPGA实现乒乓球游戏 代码及仿真 VGA实现(FPGA realizes table tennis game code and simulation VGA implementation)

spi-slave通信的vhdl实现及其仿真(VHDL implementation of spi-slave communication)