RAM控制的VHDL实现 真的很有用

VHDL code for converting BCD to Decimal

Cypress USB 的主从FPGA 控制实现代码(USB controller)

说明：  一个简单的CPU设计，支持add，sub，mvi，mv四条指令，用Verilog语言编写，在Quratus II上编译通过，仿真正确。(A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.)

说明：  DDS VHDL include everything of dds AD9914

VHDL实现 8051 CPU核 Oregano Systems 8-bit Microcontroller IP-Core-VHDL 8051 CPU nuclear Oregano Systems 8-bit Mic rocontroller IP-Core

这是一个用VHDL语言描述的I2C自动配置模块，使用了来自opencores.org的I2C核，已在altera的cyclone芯片上调试通过-This is a VHDL language used to describe auto-configuration of the I2C module, the use of the I2C from opencores.org nucleus, the cyclone in the altera-chip debugging through

用VHDL编写简单的直流电机控制方法.供大家参考.-use VHDL to prepare a simple DC motor control methods. For your reference.

UDP / IP上的Spartan3E以太网通信通过斯巴达3E发送UDP数据包到/从我的电脑。

制作16位流水灯，实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)

verilog 实现的FFT 流水线操作，速度能达到200M(verilog pipelining the FFT implementation, the speed can reach 200M)