complete with verilog language development USB2.0 IP source code, including docu...

基于FPGA的运动控制系统设计，包含位置、速度控制等(motion control)

数控分频器设计:对于一个加法计数器，装载不同的计数初始值时，会有不同频率的溢出输出信号。计数器溢出时，输出‘1’电平，同时溢出时的‘1’电平反馈给计数器的输入端作为装载信号；否则输出‘0’电平。 -NC divider design : an adder counter, loading the initial count value, have different frequency output signal of the overflow. Counter overflow, the output"1 "Level, Overflow at the same time the"1 "level feedback to the counter input signal as loading; Otherwise output"0 "level.

USB245I的基于FPGA的VHDL语言的驱动程序,应该有用-USB245I based FPGA VHDL of the driver, should useful

基于FPGA实现的一种新型数字锁相环-FPGA-based realization of a new type of digital phase-locked loop

Verilog-RISC CPU

; for 16-bit app support [386Enh] woafont=dosapp.fon EGA80WOA.FON=EGA80WOA.FON EGA40WOA.FON=EGA40WOA.FON CGA80WOA.FON=CGA80WOA.FON CGA40WOA.FON=CGA40WOA.FON

代码是伪随机数生成和检测的模块，用于通信行业的FPGA编程。包括VHDL和Verilog两种语言的版本。用于做接口测试。(This module generates or check a PRBS pattern.)

单片机与FPGA串行通信的源代码，非常实用哦-Single-chip serial communication with the FPGA source code, very useful Oh

在汉明码调试中实现了纠错原理，达到更快的效果，更少的资源浪费

FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)