扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现

this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga

system gen & accel dsp 培训资料-system gen & accel dsp

vmm log 验证平台，采用vmm搭建 (vmm log verification platform, built by vmm)

说明：  NCO生成原理接介绍、CORDIC算法原理介绍以及MATLAB与Verilog语言实现(Introduction to NCO generation principle)

identify在线调试手册,主要讲了FPGA怎样在线调试文档(identity actel edition tool set release notes)

对pci9054芯片的配置进行了设置，并对PCI9054的各状态机进行了设置，程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)

这是基于MIMO-OFDM的对CFO进行估计的源程序，对分析此同步算法有着非常重要的作用。(This is based on the source of the MIMO-OFDM of the CFO estimation, on the analysis of this synchronization algorithm has a very important role.)

一个比较经典的用VHDL实现的FIFO论文-Instance, the birthday of power wilt lift stamp cavity using VHDL wife of mother

I2C EEPROM 存取源碼, 通用ATMEL(I2C EEPROM read/write)

H.264中二进制算术编码的硬件实现Binary arithmetic coding in H.264 hardware implementation(Binary arithmetic coding in H.264 hardware implementation)