CPLD下载线制作，内含电路图等，希望对大家有帮助

decoder 2-4 digital core

Synopsys 帮助文件 version 200205-Synopsys sold version 200205

用VHDL语言实现TDMA编码,简单，明了。看标注就可以看懂-use vhdl langhanTDMA

VHDL的初学者可以参考此VHDL加法器，相信会给你带来不小的收获-VHDL beginner can refer to the VHDL adder, I believe will bring you not a small harvest

This the adder VHDL code, it contains input and output fild, also simulate file-adder

说明：  用verilog编辑的中值滤波器！语言旁表有注释方便理解！(Using Verilog editor median filter! Language beside the table annotated to facilitate understanding!)

实现一个简单的电子钟，其时间（时，分，秒）可以设置和更改，设置和更改的同时不会影响其他显示的变化（相互独立）。-achieve a simple electronic bell, the time (hours, minutes and seconds) can set and change, Settings and change will not affect the other shows the change (independent).

说明：  基于旋转编码器和LED灯组的强度调节系统设计(Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set)

dekoder code s Gray to cod „ 1 from 16”. This is program i VHDL

crc5 bolck in usb contreoller