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CORDIC算法的硬件实现 用的verilog语言-CORDIC algorithm Hardware Implementation of the Verilog language

假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

SPI接口测试程序，Xilinx参考设计，ML507硬件测试通过.(SPI interface test code，Xilinx reference design，tested on ML507 platform.)

FPGA简:讲述了FPGA的基本概念、结构、发展-Jane FPGA: FPGA describes the basic concepts, structure, development

说明：  实现二项混合式步进电机的驱动，和步进电机的细分程序。(The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.)

FPGA设计攻略及流程，包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)

说明：  基于旋转编码器和LED灯组的强度调节系统设计(Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set)

16b20b encoder and decoder

卷积码（213）的编译码，VHDL语言编写的整个工程文件，带有仿真结果图。(Convolution code (213) codec, VHDL language of the whole project file with the simulation results shown in Fig.)

说明：  文档科斯塔斯环路滤波器。。。。。般若撒根本(wendangsafwrfgvearbeabf)