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Some files
this is a sum for 2 digit numbers
- 2018-01-24 03:30:30下载
- 积分:1
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DSP28335_SPI_FPGA_RECE
DSP28335与FPGA通过spi通信,此程序为28335为主接收程序(DSP28335 and FPGA through the SPI communication, this procedure for the 28335 receiving procedures)
- 2020-12-09 13:39:19下载
- 积分:1
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数字秒表设计
资源描述这个秒表特点是计数到59分59秒9,并且有可以让计数暂停和清零。采用了二分频,六进制和十进制组合,加上扫描电路设计而成的。
- 2022-08-24 22:31:41下载
- 积分:1
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以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助...
以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助-These are the VHDL hardware description language written in a simple flow path lights technetium procedures,刚接触VHDL want to have some friends to help
- 2023-08-06 14:45:02下载
- 积分:1
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16位二进制转化为BCD码
此代码可以实现16位二进制和BCD码之间的转换。(This code can realize the conversion between 16 bit binary and BCD code.)
- 2018-10-31 13:31:13下载
- 积分:1
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华为经典FPGA设计全套入门技巧
说明: 华为FPGA设计全套资料,学习FPGA的朋友可以下载看看。(Huawei FPGA design a full set of materials, friends learning FPGA can download and see.)
- 2019-04-02 13:54:48下载
- 积分:1
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sdram_module3
能够实现16位的SDRAM的读写,没有仿真文件,只有SDRAM读写的源代码,用Verilog编写(can complete read or write sdram, only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分:1
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UART的源(格版)
UART 源码 (lattice version)-UART source (lattice version)
- 2022-10-19 10:25:04下载
- 积分:1
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FPGA
基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)
- 2013-03-08 17:09:29下载
- 积分:1
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shuzishizhong
这是基于verilog hdl的数字时钟源代码,能够实现时分秒的计时,可以手动进行调时与调分。(This is based on the digital clock verilog hdl source code, can be achieved when every minute of the time, you can adjust the time manually adjusting points.)
- 2013-12-10 22:21:55下载
- 积分:1