Verilog HDL

忆阻器的SPICE建模模型说明及仿真结果说明(Memristor SPICE modeling and simulation results show that the model describes)

卷积码(2,1,7)编码器，一个输入，两个输出(Convolution code (2,1,7) encoder, an input and two outputs)

offset_cancellation code for matlab to hdl

在开发板EGO1上实现的直升机飞行游戏，随时间的累积，速度不断加快，数码管显示积分( Helicopter game in verilog)

LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.

CORDIC算法的硬件实现 用的verilog语言-CORDIC algorithm Hardware Implementation of the Verilog language

利用扫描加记数程序实现百进制,适合VHDL的初学者使用.-increase in the use of scanning program in mind several hundred 229 and is suitable for beginners to use VHDL.

DAC0832的Verilog代码，适用于与ADC0809同时学习，效果明显！(DAC0832 Verilog code, applicable at the same time with ADC0809 learning, the effect is obvious!)

这个是用VHDL实现的正负脉宽调制器，同样是对新手有帮助，高手不必看了。-This is achieved using VHDL positive and negative pulse width modulator, the same is to help novice, you do not have to read. Ha ha