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altremote_update_cyclone5
altera remote updata cyclone5 平台例程,无nios核版本(altera remote updata cyclone5 platform routine
do not use nios)
- 2021-04-23 17:38:47下载
- 积分:1
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Asqare
用fpga实现的连连看游戏,功能还不完善,不过可以借鉴。(Realize with FPGA Lianliankan game, function is not perfect, but can be used for reference.)
- 2012-08-27 18:39:59下载
- 积分:1
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SPI协议的VHDL/Verilog语言实现 SPI_Core
SPI协议的VHDL/Verilog语言实现。(SPI agreement VHDL/Verilog language.)
- 2020-06-27 10:00:02下载
- 积分:1
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在QuartusII下进行编译和仿真的时候,会出现一堆warning,有的可以忽略,有的却需要注意...
在QuartusII下进行编译和仿真的时候,会出现一堆warning,有的可以忽略,有的却需要注意-QuartusII warning solving
- 2022-03-01 12:03:29下载
- 积分:1
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简易环形FIFO的设计、简单异步串行通信接口设计等
简易环形FIFO的设计、简单异步串行通信接口设计等-verilog
- 2022-01-25 19:03:58下载
- 积分:1
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这是“状态机设计(讲稿)”,希望对正在学VHDL的同学有帮助,谢谢!...
这是“状态机设计(讲稿)”,希望对正在学VHDL的同学有帮助,谢谢!-This is the "state machine design (the script)", and I hope to learn VHDL is there to help the students, thank you!
- 2022-11-16 16:25:03下载
- 积分:1
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DE2_PS2_Example
PS2 Module for Altera DE2
- 2017-06-20 21:04:32下载
- 积分:1
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并行通信代码(调试通过)
并口通讯代码
并口通讯代码(调试通过)
--该代码目前能实现单个字节的收发-Parallel communications code (debugging through)-- The code can now achieve a single byte of Transceivers
- 2022-05-20 22:29:56下载
- 积分:1
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rc6_decryption
rc6 algorithm designed based on verilog and is verified
- 2020-12-01 21:59:28下载
- 积分:1
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Tmu_ni_dian_yh
这个课程设计的题目是模拟电压采集电路路与程序设计,报告书的内容都比较详细.
(The topics of this course design is an analog voltage acquisition circuit Road and program design, the contents of the report are more detailed.)
- 2012-07-19 09:23:07下载
- 积分:1