Cmos 全加法器使用绝热逻辑

模拟示波器的现实程序，有x，y和光标。采用AD5440输出，现实效果很好。（示波器x-y方式）(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

vhdl code for carry lookahead addder

说明：  基于数据通路和控制器的高校简单PPM设计(PPM design based on datapath and controller)

codes for zynq devices

从bt656数据流中提取出同步信号, 适合于搞fpga/cpld开发调式(bt656 internel sync to extern sync singal， bt656 internel sync to extern sync singal)

这是一个基于FPGA实现的GPS的程序，保证可以用-This is an FPGA-based GPS program to ensure that you can use ... ...

VHDL产生时钟50分频程序，供初学者参考-VHDL generated clock frequency of 50 procedures, the reference for beginners

这是“VHDL设计”讲稿，希望对初学者有用，-"VHDL design" script, useful for beginners, thank you! !

LDPC码的短循环对LDPC码性能的影响 (Short Protograph-Based LDPC Codes)