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This code for countor . it is design in verilog HDL.
This code for countor . it is design in verilog HDL.
- 2022-07-27 18:33:04下载
- 积分:1
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最后64点FFT
最终FFT 64点使用定点。
- 2022-01-22 00:00:34下载
- 积分:1
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一个以太网卡的硬件描述,可以参考进行设计网卡芯片。
一个以太网卡的硬件描述,可以参考进行设计网卡芯片。-an Ethernet card hardware description, reference card chip design.
- 2023-08-18 05:00:03下载
- 积分:1
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svpwm3
说明: 基於空間向量調變的開關法,在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)
- 2019-01-04 16:07:37下载
- 积分:1
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Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!...
Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
- 2022-03-18 22:36:54下载
- 积分:1
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FIFO
Simulation and Synthesis Techniques for Asynchronous
FIFO Design
- 2013-08-27 16:07:08下载
- 积分:1
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CameraLink_Oserdes2_test
40M时钟输入经过iserdes倍频到960M(input 40M o clock and output 960M )
- 2014-02-25 14:06:38下载
- 积分:1
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This code that genetes a square, sawtooth and a triangular waveform. It is usefu...
This code that genetes a square, sawtooth and a triangular waveform. It is useful for designing a function generator in VHDL.
- 2022-07-04 20:04:24下载
- 积分:1
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cordic_dds
采用CORDIC算法的直接数字频率合成器的设计(CORDIC algorithm uses direct digital frequency synthesizer design)
- 2015-08-18 16:15:17下载
- 积分:1
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IOLED
基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)
- 2011-09-02 17:09:24下载
- 积分:1