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MIPSTOP
misp顶层文件,verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分:1
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testbench(xilinx)
Testbench 不仅要产生激励也就是输入,还要验证响应也就是输出。当然也可以只产生
激励,然后通过波形窗口通过人工的方法去验证波形,这种方法只能适用于小规模的设计(The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce
Incentive, and then the waveform by the waveform window by artificial means to verify, this method is only applicable to small-scale design)
- 2012-04-18 16:08:25下载
- 积分:1
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VHDL写的串口,很好用,程序非常简单,可以调试用
VHDL写的串口,很好用,程序非常简单,可以调试用-Written in VHDL serial, very good, and the procedure is very simple, you can debug with
- 2022-08-08 18:58:10下载
- 积分:1
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key_debounce-source-code
这是fpga按键消抖的源代码,在很多fpga按键实验中都可以用到,能够进行代码移植。(This is the source code of the FPGA buttons, in many FPGA key experiments can be used, and can carry out code.)
- 2015-10-31 10:19:03下载
- 积分:1
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synchronous serial data transmission circuit SSDT the basic function is to conve...
同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发送四个字节,在发送中出现5个1时插入一个0,在四个数据发送结束而下一次同步没有开始之前,发送7FH,这时中间不需要插入零
-synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted
- 2022-03-21 08:08:19下载
- 积分:1
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计数器的VHDL语言程序实现1
VHDL语言编写的计数器程序,实现1到9999计数,并动态扫描显示,带清零和暂停功能,课上作业自编程序-VHDL language of the counter program to achieve 1-9999 counts, and the dynamic scan showed, with Clear and suspension of functions, classes, on a self-compiled programs
- 2022-01-21 03:16:50下载
- 积分:1
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FirlterTeam
数字滤波器组。包含matlab程序和word说明。通过一个低通数字滤波器和多个带通数字滤波器组合成一个滤波器组(Groups of the digital filter. Contains matlab program and word description. Through the combination of a low pass digital filter, and a plurality of band-pass digital filter into a filter bank)
- 2013-01-15 20:38:33下载
- 积分:1
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ecc
说明: This paper analyzes the cryptography scheme of the Trust Platform Model(TPM). The focus of the discussion would be the comparison of elliptic curve cryptography and the nowadays widely used 2048-bit RSA in evaluating which would be better suited to be used on TPM. A TPM implementation scheme based on ECC is proposed, which includes encryption and decryption schemes, signature and verification scheme, key agreement scheme. Corresponding examples of TPM commands would also be given.
- 2019-06-13 14:53:45下载
- 积分:1
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dpll
说明: 在quartus下搭建的数字锁相环,能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)
- 2020-06-21 01:00:02下载
- 积分:1
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包含了VHDL语言的100个例子,如交通灯控制器,空调系统有限状态自动机,FIR滤波器,五阶椭圆滤波器,闹钟系统的控制...
包含了VHDL语言的100个例子,如交通灯控制器,空调系统有限状态自动机,FIR滤波器,五阶椭圆滤波器,闹钟系统的控制-VHDL language contains 100 examples, such as traffic light controllers, air-conditioning systems finite state automata, FIR filter, the fifth-order elliptic filter, alarm system control
- 2022-02-16 09:18:03下载
- 积分:1