坦克游戏的VHDL代码

北大verilog课件，数字集成电路设计入门，从HDL到版图-North Verilog courseware, digital IC design entry, from HDL to the map

一个用VHDL编写的跑马灯程序和60进制计数器的程序，一个是自己设计的一个是老师要求，都在实验箱上验证成功，希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.

电压脉冲控制的一个工程---包括vhdl源程序和编译后产生的相关文件-Voltage pulse control of a project- including VHDL source code and compile the relevant documents after

可在FPGA上运行的8051 IP coore，是学习FPGA及SPOC的好资料。 (8051 IP coore, can be run on the FPGA is good information to learn FPGA and SPOC.)

用VHDL实现视频控制程序,实现对图像的采集和压缩,-Using VHDL realize video control procedures, to achieve image acquisition and compression,

verilog编写实用多功能电子表-Verilog prepared practical multi-function electronic Table

嵌入式的LCD的图片显示程序，是LCD最好的资料。(Embedded LCD picture display program is the best LCD data.)

该文件是booth乘法器的verilog源代码，经过最终的仿真，可以直接运行(This file is booth multiplier verilog code, after the final simulation, can be directly run)

应用背景通用模块，以产生可重构的源时钟频率的传输速率。该模块可用于UART，自定义串口协议等。提供一个时钟发生器模块产生可选 ；-波特利率和；——时钟源（可选择分因素） ；还产生接收 ；——时钟的16倍，8倍，倍，倍的传输波特率 ；关键技术UART，VHDL，FPGA，CPLD programmanle逻辑器件。设备无关的代码

FPGA控制AD7321的模块，是本人亲自试验过的。有Verilog源码，和简单文档(Fpga control module of ad 7321, is I personally tested. Verilog source code, and simple documentation)