tcp/ip master

Quartus? II 相关的语言 详细介绍了VHDL verilog软件开发过程(Quartus ? II related language detailed introduces the verilog VHDL software development process )

STOPWATCH FPGA SEVEN SEGMENT DISPLAY

Modelsim简明使用手册，十分适合新手使用-Modelsim concise user manual is very suitable for novice to use

自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.-Their own design this year

基于VHDL的I2C程序0003,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0003, a very good paper and procedures, we quickly under ah

In computer storage, multipath I/O is a fault-tolerance and performance enhancement technique whereby there is more than one physical path between the CPU in a computer system and its mass storage devices through the buses, controllers, switches, and bridge devices connecting them

An Alarm Project Writen in VHDL for FPGA Devices

使用nios2点亮一个led灯，使用软件quartus13.0，开发板de2-115(nios2 led quartus13.0 de2-115)

VHDL教程及源码,是新手入门的不二选择!-VHDL Tutorial and source code is the only option, beginners!

基于BCD码的十进制ALU设计，可实现加减乘除的功能(BCD to decimal ALU based design can achieve the arithmetic function)