-
乐曲播放器
用vhdl语言编写的程序,可以播放乐曲,有分频模块,可播放梁祝等歌曲。
- 2022-01-21 18:49:47下载
- 积分:1
-
FPGA-基于fpga的PWM
一段很好地讲述PWM的VHDL硬件代码,可以在不同SOPC上运行实现
- 2022-01-30 19:23:51下载
- 积分:1
-
UART(RS232)
用VERILOG语言实现的通用异步串行收发器(RS232收发器),波特率可设置,通讯稳定,已成功应用于实际项目。(VERILOG language with universal asynchronous serial transceivers (RS232 transceiver), the baud rate can be set, communication stability, has been successfully applied in actual projects.)
- 2021-04-01 10:59:08下载
- 积分:1
-
volt_mea_disp
本程序是用verilog 编写的模块,用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)
- 2013-07-26 00:58:35下载
- 积分:1
-
dianzibiao
这是一个数字逻辑课程的电子表的实现,利用VHDL语言实现,初学者可以完全掌握,很有帮助。(This is the realization of the electronic timepiece a digital logic course, the use of VHDL language, beginners can fully grasp and helpful.)
- 2016-04-19 17:20:34下载
- 积分:1
-
DDSa
程序是完整的一个数字下变频器的一个Verilog程序,经测试可以使用,欢迎下载(Program is a complete Verilog program a digital down converter, tested can be used, please download)
- 2016-05-23 22:11:25下载
- 积分:1
-
数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成
果的可修改性和可移植性都较差。基于VHDL 的数控分频器设...
数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成
果的可修改性和可移植性都较差。基于VHDL 的数控分频器设计,整个过程简单、快捷,极易修改,可移植性强。他可利用
并行预置数的加法计数器和减法计数器实现。广泛应用于电子仪器、乐器等数字电子系统中。-NC divider output signal frequency is a function of input data. Using traditional methods of design, process and circuit design are complex and can modify the design of the results are poor and portability. NC VHDL divider based on the design, the whole process simple, fast, easy to modify, strong portability. He can use preset number of parallel addition and subtraction counter counter to achieve. Widely used in electronic equipment, musical instruments and other digital electronic systems.
- 2023-08-29 11:30:03下载
- 积分:1
-
这是一个VHDL代码为USB
this a vhdl code for usb-this is a vhdl code for usb
- 2022-01-26 08:21:54下载
- 积分:1
-
LMS
用verilog编写的lms算法。可实现自适应滤波功能(Lms algorithm written in verilog. Adaptive filtering can be achieved)
- 2021-05-15 11:30:02下载
- 积分:1
-
a vhdl_program used for flat detect
平坦度检测中的高度检测算法,使用ISE开发环境,语言为VHDL,平台是XC3S4-a vhdl_program used for flat detect
- 2022-01-27 09:06:50下载
- 积分:1