Verilog languages with four arithmetic logic unit ALU, functional reference to 7...

一个用VHDL完成的8位数显的16进制的频率计-a VHDL completed 8 of 16 significant median band of frequency meter

fsk调制与解调，此程序经过验证，可以运用，通讯方面的同学可以用-FSK modulation and demodulation, this procedure has been verified and can use communications students can use

用VHDL写的计算器，实现加减功能以及ＶＧＡ显示功能，适合VHDL初学者使用。-VHDL write calculators, Modified functions and achieve VGA display, VHDL for beginners.

listing program clock

verilog 写的 电话计费器程序-verilog to write a telephone billing program

掌握SDRAM数据读写、刷新、初始化以及FPGA串口收发时序，熟练FIFO IP核的生成和调用。(Master SDRAM data read and write, refresh, initialization and the timing of sending and receiving of the serial port of the FPGA, skilled in the generation and invocation of the FIFO IP core.)

用于sopc builder添加组件用的ps/2 键盘 ipcore-Sopc builder used to add components used ps/2 keyboard IPCore

设计一个十进制计数器，具有显示位置随计数时钟在八个数码管中左右滚动的功能。(Design of a decimal counter, a display position with the count clock in at around eight digital scrolling function.)

FPGA学习的非常好的资料，希望广大朋友都可以学习学习啊(FPGA to learn very good information, I hope our friends can learn ah)

使用vhdl语言在altera公司的up3板上产生vga信号，里面有详细的解析和说明，是一个很好的教程。和上一个文件razzle差不多，但是产生的效果不一样。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide. And on a razzle almost document, but the effects are not the same.