用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！...

基于fpga和xinlinx ise的音乐播放器vhdl程序，希望对你有所帮助！-and xinlinx ideally music player VHDL process, and I hope to help you!

Design FPGA in Labview

USB3.0开发板资料，采用CYUSB3.0(USB3.0 development board, using CYUSB3.0)

说明：  formality2016 userguide

说明：  这是一款由晶振产生的脉冲控制的数字钟，可以从00:00:00到23:59:59之间进行计时。(this is a clolk controlled by continuious pulse.it can timing from 00:00:00 to 23:59:59.)

用VHDL编写的计算器，能实现简单的加减乘除四则运算

altera 的reed solomn 设计(reed solomn design from altera)

用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件(Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document)

说明：  (Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig

一個紅外線感測電路的設計，是經由opa來設計。(An infrared sensing circuit design, is designed by opa.)