Digital Design and Modeling with VHDL and Synthesis

说明：  基于FPGA的QPSK调制解调电路设计与实现 (QPSK)

基于DE2-115的数字时钟 1.液晶显示，数码管显示 2.整点报时 3.闹钟 4.设置时间 5.设置闹钟(Digital clock based on DE2-115 1. LCD display, digital tube display 2. whole point 3. alarm clock 4. setting time 5. set the alarm clock)

DAC0832 接口电路程序.功能：产生频率为762.9Hz的锯齿波DAC0832VHDL程序与仿真-DAC0832 procedures interface circuit. Functions: generate the sawtooth frequency of 762.9Hz and simulation procedures DAC0832VHDL

Verilog的135个经典设计实例.使你工作使用学习中，会有很大帮助，各种典型案例(135 classic Verilog design examples. Make your work with the study, will be of great help, of various typical cases )

fifi asyncronous and syncronus

交通灯控制器，verilog，可控制两个方向各四盏灯的亮灭，并具有时间显示(traffic light controllor，by verilog)

开源软核处理器OpenRisc的SOPC设计

用VERILOG编写的数字电子钟，用数码管进行显示时间-VERILOG prepared with digital electronic clock with a nixie tube display time

Verilog实现DDS线性调频，Verilog实现DDS线性调频(Verilog implementation of DDS linear FM，Verilog implementation of DDS linear FM)

verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)