该程序实现的是n位全加器，首先用与非门实现一位全家器，最后实现n位的全加器。...

Matlab code to simulation the wireless channel type.This is the most common case called Rayleigh channel.And in the frequency selective channel.

说明：  HDB3编码通过verilog实现，通过modelsim仿真(HDB3 coding is implemented by Verilog and simulated by Modelsim)

鉴于stm32在keil平台上的ADC采集转化，在LCD屏上显示程序(voltage acquisition adc)

超前进位加法器得VHDL实现小点资料代码(CLA was a small point of information VHDL code)

说明：  一个使用VHDL进行正弦波信号产生的历程，非常有用。(A sine wave signal generator using VHDL for the course, very useful.)

该计数器可以实现从0到1000的技术，程序简练执行效率高(counter1000)

ad9649的fpga驱动程序,FMC接口，基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)

uart_tr 异步串口通信主机 使用verilog HDL语言编写(uart_tr the host of the uart )

说明：  VHDL实现的算术逻辑计算单元（ALU），包括modersim测试文件，即仿真结果。(VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.)

fpga 基于FPGA的mif文件创建与使用-fpga FPGA-based mif file creation and use of