运行在FPGA上的Verilog程序(实现对ADC的控制)

基于CPLD 的光电脉冲码盘 信号四倍频电路设计-CPLD-based electro-optical pulse encoder signals four multiplier circuit design

说明：  用verilog HDL编程实现的基于DAC0832的三角波信号，可借鉴编程实现DAC0832芯片控制(Programming with verilog HDL DAC0832-based triangular wave signal, we may learn programming DAC0832 chip control)

说明：  xilinx 平台的SPI从接口实现源码，供参考学习(used xilinx,slave-spi interface.)

This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)

In this case is a QPSK algorithm code for mapping the interleaved code, using VHDL language. This code provide the method of mapping the code by using QPSK algorithm.

自动售货机的状态机实现 自动售货机的状态机实现(this is a automachine)

说明：  Matlab to hdl code for Least_square testbench

说明：  AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream

从FIFO到到RS232的实现，用于接收和缓存数据(TripAdvisor RS232 FIFO implementation for receiving data and cache)

基于FPGA的误码测试仪 （已注释） --锁相环-M序列生成模块--数据接口模块- --模拟信道模块---本地M序列生成模块--同步模块--误码统计模块--显示模块-(FPGA-based BER tester)