A VHDL source code for testing the digits and the switches on a spartan 3 basys...

本代码实现了全加器的功能，可供初学者学习-This code implements a full adder functions, for beginners to learn

VHDL常用源程序，希望以EDA技术学习者有用！-VHDL source code commonly used, I hope to EDA technology learners useful!

说明：  FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。

ZardWars Files ------------------------------

对与单片机常用的功能看门狗，本程序用vhdl硬件语言实现次功能。-Commonly used with single-chip watchdog function, the procedures for using VHDL hardware language functions realize times.

VHDL描述的跑马灯程序，用于初学者练习-Marquee procedures described in VHDL, for beginners to practice

16位有符号和无符号乘法器FPGA源代码(16-bit signed and unsigned multiplier FPGA source code)

(Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig

fir filter 程序 老师上课留的作业，在这里跟大家分享一下，希望能有所帮助(fir filter procedures teacher in the class to stay the operation here to share with you, hope can be helped)