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R_I_CPU
学校实验,用Verilog实现的单周期CPU,分别实现I型、R型、指令,使用的工具为ISE(School experiments, using Verilog to achieve a single cycle CPU, respectively, to achieve I type, R type, instruction, the use of tools for ISE)
- 2018-06-11 16:38:10下载
- 积分:1
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a
说明: 利用FPGA实现SDH开销中帧头A1A2的检测(FPGA implementation using SDH overhead in the frame header detection of A1A2)
- 2010-05-25 21:17:03下载
- 积分:1
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cf_interleaver2
interleaver即交织器,里面包含有C,VHDL,VRILOG HDL三种语言写的交织器, 包括各种各样的组合达六七十种,描写详尽,是一个难得的学习交织器的材料 -interleaver that interleaver, which contains C, VHDL, VRILOG HDL three languages to write the interleaver, including a variety of combinations to depend species, a detailed description, is a rare study of the materials are intertwined
- 2022-03-16 02:30:32下载
- 积分:1
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C-V2X-master
说明: LTE is an abbreviation for Long Term Evolution.
- 2019-06-29 01:08:09下载
- 积分:1
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uart
说明: fpga串口收发完整程序,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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hamid
very nice program that i ensure anyone can use easily and will be efficient for hard project of elevator
- 2009-07-26 13:27:38下载
- 积分:1
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三八译码器
verilog编写的程序实现三八译码器功能,输入为3位,输出为8位,实现选择的功能。
verilog编写的程序实现三八译码器功能,输入为3位,输出为8位,实现选择的功能
- 2022-02-22 13:23:45下载
- 积分:1
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xapp1014-xilinx-sdi
用fpga实现SDI,每一步都很清楚 搞视频的可以参考(Fpga realization of SDI, each step are clearly engaged in the video can refer to)
- 2020-11-10 19:19:46下载
- 积分:1
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sqr
VHDL CODE FOR SQUARE WAVE GENERATOR
- 2014-01-22 17:14:20下载
- 积分:1
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LabView
说明: 阿尔泰PCI8664的采集卡labview程序(PCI8664,labview,programm)
- 2021-04-14 16:48:55下载
- 积分:1