计算机组成原理课程设计(vhdl语言实现)

能产生正弦波、三角波、方波和e指数衰减的扫频波，且相关参数可调(Can produce sine wave, triangle wave, square wave, and e exponential decay wave sweep and adjustable parameters)

Altera DE2 上使用 vhdl 语言设计 RS232 控制器。这是一个串口模块可用于嵌入系统。

CH4CH2CH1VHDL 数字电路参考书所有程序9-CH4CH2CH1VHDL digital circuit reference all proceedings 9

verilog编写的基于CA算法的m序列发生器，其中验证了多种CA系数来实现m序列。(CA-based algorithm written in verilog m-sequence generator, which verify the CA factor to achieve a variety of m-sequence.)

对ad0809的控制代码( ad0809control)

VHDL语言编写的FIR滤波器源码 对于嵌入式设计者有很好的指导作用 -VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding

AD转换的Matlab程序，将输入电压转换成时间(脉冲宽度信号)或频率(脉冲频率)，然后由定时器/计数器获得数字值(AD conversion of the Matlab program, the input voltage is converted into a time (pulse width signal) or a frequency (pulse frequency), and then to obtain a digital value by the timer/counter)

project proposal of verilog language that is gud for beginners

fir filter 程序 老师上课留的作业，在这里跟大家分享一下，希望能有所帮助(fir filter procedures teacher in the class to stay the operation here to share with you, hope can be helped)