VHDL source VHDL source VHDL source

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SRAM简单测试，测试其性能及其速度，判断SRAM是否可用(Test its performance and speed to determine if SRAM is available)

个人参与的某国家工程并行排序MATLAB程序，用于FPGA的RTLAB仿真，使用Simulink工具生成HDL代码。测试可用。(Individuals involved in sort of a national engineering parallel MATLAB programs for the FPGA RTLAB simulation, using the Simulink tool to generate HDL code. Test available.)

串口收发程序，成功通过仿真，可以用来学习(Serial transceiver,It is successful through simulation and can be used to learn)

说明：  关于quartus与modelsim 仿真(about quartus and modelsim simulator)

UART模块的VHDL语言设计(Design of VHDL language based on UART module)

German REAL LPT! USB2LPT

说明：  Xilinx原语的使用介绍，特别全面，希望对大家有所帮助，(Introduction to the use of Xilinx primitives, particularly comprehensive,I hope it will be helpful to you all.)

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

PrimeTime Intro to STA -PrimeTime Intro to STA