FIR filter basic verilog code for implementation

学习ISE的好资料，想要使用XILINX芯片进行开发必看(ISE learning good information, want to use a must-see XILINX chip development)

调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)

fpga实现ＣＡＮ总线控制器源码,每个项目都有说明文件，介绍使用方法。-fpga CAN Bus Controller source, each with explanatory documents on the use of methods.

适用于NIOS II的1024点FFT C算法( 1024-point FFT C algorithm for NIOS II)

使用spi模式初始化w5100，实现了快速以太网的初步建立(Using the spi mode initialization w5100, to achieve the initial establishment of a Fast Ethernet)

4X4 KEYPAD 的密码比较模块，可以核对6位的密码-4x4 KEYPAD password comparison module, can check the password 6

说明：  用Verilog编写ad_9866的相应程序，在FPGA上实现相应功能(The corresponding program of ad_9866 is written with Verilog, and the corresponding functions are realized on the FPGA.)

详细讲解时序约束培训教材，有利于更好对时序约束的理解(Timing constraints elaborate training materials, facilitate better understanding of the timing constraints)

数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL

以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子-Ago in the school curriculum design, the use of Verilog CPU prepare a procedure under the board