vhdl实现vga接口设计，非常实用的一段代码，学习用

source vhdl code of D flipflop logic

vga编程。实现3种模式的vga控制，分别产生横彩条，竖彩条，棋格彩条的显示-vga programming. Realization of the three-mode vga control, generate horizontal color of the color of the shaft, and the chess grid color of the show

任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.

说明：  VHDL资料 很不错的！！！！！！！！！！！(VHDL )

des加密算法的verilog语言的实现-des encryption algorithm to achieve the Verilog language

基于VHDL语言的3级序列的产生，可以循环产生周期为7的m序列 -Based on the VHDL language for selecting the three sequences, you can have a cycle for cycle 7 m sequence

這裡提供Auto Gain Control 的詳細代碼與功能介紹(Here are details of the code and the Auto Gain Control Functions)

用verilog编写的包含有与DSP通信，三电平svpwm实现的程序，(Written in verilog contains communicate with the DSP, three-level svpwm realize the procedures)

用VHDL写的源代码程序，包涵三人表决器，七人表决器，全加器以及模24，模60的计数器，都是单文件的，由于程序小又多，所以集中在一起，供新学习VHDL语言的朋友们参考。-With VHDL source code written procedures, includes three of the voting machine, vote on seven people, and full adder, as well as modulus 24, modulus 60 counters, are single-file, as many small procedures, so together for the new Learning VHDL Language Reference friends.

spartan-3e fpga vhdl 实现的计数器 记满后点亮小灯(spartan-3e fpga vhdl counter to light led)