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vga
vga,显示彩条,及其简单易懂,适合初学(vga, display color bars, and its easy-to-understand, suitable for beginners)
- 2012-10-10 21:10:15下载
- 积分:1
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Description Sramoc (K, M) said the figures used in 0,1,2 ..., K
描述
Sramoc ( K , M ) 表示用数字0、1、2…、K-1组成的自然数中能被M整除的最小数。给定 K、M,求Sramoc ( K,M )。例如 K=2,M=7的时候,Sramoc( 2 , 7 ) = 1001。
输入
第一行为两个整数K、M满足2
- 2022-05-25 16:18:18下载
- 积分:1
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reference
早迟门(early late gate),比特同步算法,该文档详细的说明了早迟门算法的原理以及具体的实现步骤(Early late gate (early late gate), bit synchronization algorithm, the document explains in detail the principles of early-late gate method and the specific implementation steps)
- 2015-04-30 15:06:04下载
- 积分:1
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The use of Altera' s FPGA
使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个ROM存储器。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a ROM memory.
- 2022-08-23 17:16:15下载
- 积分:1
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数字密码引爆器的输入描述:1、 在开始输入密码以前的等待状态,首先要按READY键,表示目前准备就绪,可以输入数字密码;2、 当引爆事件发生后,应该回到等待状态...
数字密码引爆器的输入描述:1、 在开始输入密码以前的等待状态,首先要按READY键,表示目前准备就绪,可以输入数字密码;2、 当引爆事件发生后,应该回到等待状态,设置WAIT_T键;3、 如果输入密码不正确,此时要操作READY和WAIT_T是不起作用的,必须由设计人员重新设置到等待状态,设置SETUP键,SETUP为内部按键,操作人员应该不能接触;4、 确定密码输入后,要设计一个点火按键FIRE;-digit passwords detonated"s input Description : one at the start and enter the password before the wait state, according to First READY button, now ready to be imported into digital code; Two, when detonated after the incident, should wait for the state to set up WAIT_T bond; three, if a password is not correct, this time to operate READY WAIT_T and is non-functional, the design must be re-installed to wait for the state, set up SETUP button SETUP internal keys, the operator should not contact; 4 to determine the password, to design a FIRE- ignition keys;
- 2022-02-26 18:42:40下载
- 积分:1
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lcd1602_drive
用Verilog实现1602的配置及功能。正确编译与实现(Realized by Verilog 1602 configurations and functions. Compilation and implementation of the right)
- 2011-01-21 16:47:27下载
- 积分:1
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Using Verilog to write a serial transmission to the parallel transmission of the...
一个用verilog写的串行传输到并行传输的程序,在quaters下编的-Using Verilog to write a serial transmission to the parallel transmission of the procedure, under the quaters
- 2022-06-14 12:50:53下载
- 积分:1
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DES加密算法的VHDL实现,采用流水线技术实现
DES加密算法的VHDL实现,采用流水线技术实现(The VHDL implement of DES encrypt algorithmic)
- 2020-07-01 03:00:02下载
- 积分:1
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modelsim_example_c
modelsim仿真,大量vhdl程序,验证,很有价值!(The ModelSim Simulation, a large number of VHDL procedures, validation, great value!)
- 2013-05-05 15:11:06下载
- 积分:1
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designers guide to vhdl(third edition)
说明: designers guide to vhdl(third edition)这本书好像在国外vhdl入门中挺流行的, 爱思维尔有资源,但是是各个章节散装的, 我把它们合成了(The book designers guide to vhdl (third edition) seems to be very popular in foreign vhdl entry. Ixel has resources, but it is a loose chapter of each chapter, I synthesized them)
- 2021-01-14 16:23:11下载
- 积分:1