VHDL描述的时钟分频电路，用途广

FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.

2004 SNUG of systemverilog

在ISE下，FPGA产生线性调频信号，并且产生信号的参数可调(In ISE, the FPGA generates a linear frequency modulation signal, and the parameters of the signal are adjustable.)

设计遥控器接收解码电路。该电路接收编码后的串行数据，解码输出数据。电路接收 到的串行数据的格式为： 4 位同步码“ 1010”， 4 位数据（高位在前）， 1 位奇校验码（对前 8 位数据校验）(Design of remote control receiver decoding circuit. The circuit receives the encoded serial data and decodes the output data. The format of the serial data received by the circuit is: 4 bit synchronous code "1010", 4 bit data (high in the front), 1 bit parity check code (check for the first 8 bits of data))

Ａ８２５５的ｖｈｄｌ源代码，比较简单的一个-Vhdl source code of A8255

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

串口程序，基于VHDL 的，很好的程序 快下吧-Serial procedures, based on VHDL, and a very good program, are you fast

alter FPGA，包含sdram的nios系统开发实验完整工程文件-nios develop based nios IDE6.0，system involved an sdram

本例为TLC7524接口电路VHDL原程序-Example for the TLC7524 interface circuit VHDL original procedure

RAM控制的VHDL实现 真的很有用 -VHDL implementation of the RAM control true true useful useful