VHDL描述的时钟分频电路，用途广

The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen

从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

实现对LCD1602的Verilog HDL编程(the program for LCD1602 based on Verilog HDL)

页面置换算法中的三种算法相关程序代码 FIFO LUR OPT-yemianzhihuansuanfa

自己编写的verilog语言 PWM实现的一种方法希望有用(verilog PWM)

文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )

modbus通讯必须的校验码生成器，可以直接使用(modbus crc16/8 free use)

I2C控制器的源代码，Verilog HDL语言编写，可以直接调用-I2C controller source code, Verilog HDL language, you can directly call

xilinx edk 9.2 破解器/注册机(xilinx edk 9.2 crack)

spartan 3E和verilog HDL的初学者极好的教材，本程序可直接下载到spartan实验板上运行。(Spartan 3E and Verilog HDL beginners excellent materials, the program can be downloaded directly to the spartan experimental board run.)