based on VHDL development of the I486 bus interface procedures. Implementation o...

利用两个加法器和两个乘法器一起并行处理来实现

detailed spec for Xilinx V5 FPGA, reference for programming of FPGA, system designer or ASIC designer.

四轴动力模块，用一个顶模块控制，输入有：油门（20档）；指令；水平仪控制指令，4个输出口(Axis power modules, with a top module control inputs are: accelerator (20 files) instruction Level control instructions, four output ports)

基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)

说明：  系统介绍了数字开发系统平台FPGA设计中的部分技巧 对于FPGA开发研究人员具有一定的指导和帮助意义(Systematic introduction of digital development platform FPGA design techniques for FPGA development of some of the researchers have some sense of guidance and help)

xilinx spartan6的pcie pio源代码(xilinx spartan6 pcie pio demo)

卷积码编码译码程序以及其modelsim仿真波形文件等(Convolutional code encoding and decoding procedures and the Modelsim simulation waveform file)

关于语音通信信道调制的程序代码，是论文的仿真程序(About voice communication channel modulation code, the authors of the paper simulation program)

spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert

如何编写测试文件，，test bench的编写方法和是列，，总结的非常好的东西(how to code test bench in verilog)