Keil C51和A51，AVR uedit x86汇编的亮点，VHDL格式

与单片机相比，用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809，根据ADC0809的工作时序使用CPLD产生该控制信号，CPLD启动AD转换后，得到的数据送至单片机并在PC机及数码管上显示AD转换结果。(Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of the experimental device for the ADC0809 ADC0809 Timing CPLD is used to generate the control signal, the CPLD to start the AD conversion, the data sent to the microcontroller and the AD conversion result on the PC and digital tube display)

FPGA实验_HDB3编码器设计(包含5个模块)(FPGA design experiments _HDB3 encoder (including 5 modules))

Verilog实现高速AD7606数据采样，8通道，采样频率可调，支持串口数据发送，亲测可用。(Verilog AD7606 high-speed data sampling, 8-channel, the sampling frequency is adjustable, support for serial data transmission, pro-test is available.)

说明：  半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)

一种基于FPGA的CPU设计-FPGA-based CPU design ........

EDA技术与VHDL课件，利用EDA技术进行电子系统设计(EDA technology and VHDL courseware, the use of EDA technology for electronic system design)

fpga VHDL语言，控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS

ebook verilog HDL programming book

vhdl语言实现的频率发生器，可以产生不同的频率-A frequency generator wirriten by VHDL, which can generate different frequecies.

挂靠在AMBA2.0的AHB总线上的DMA装置，用于直接发起数据传输。(Anchored the DMA devices the AHB bus AMBA2.0, for initiating data transfer.)