NIOS II IDE 编程， uart_txd测试程序，仅供参考。

说明：  使用FPGA实现RGB图像转灰度图像的算法，下载入自己的电路板可直接将摄像头拍摄到的图像实时转换成灰度图像(FPGA is used to realize the algorithm of transforming RGB image into gray image. The image captured by the camera can be converted into gray image in real time by downloading it into its own circuit board)

低频数字式相位测量仪 使用的VHDL语言，在MUXPLUS2环境下使用！ (digit hpase detecter use for low-frequence)

驱动8*8点阵块显示汉字，可以自己根据要显示的内容随意更改，已通过验证。(Blocks of 8* 8 dot matrix drive display Chinese characters, you can display the content according to their random changes, has been verified.)

ieee paper on power gating and can be use full for implementing on ip core

verilog hdl verilog hdl verilog hdl-verilog hdl

     提供2个VHDL程序实现键盘显示的功能，第一个是16*16点阵显示“北京欢迎”，用VHDL语言编程实现，串烧在单片机实验工具箱上，让单片机点阵键盘上依次显示“北京欢迎”的字样。另附有LED数码管循环显示0～9数字的VHDL程序 ，成功串烧后，键盘上连续显示0~9这10个数字。

可综合的vhdl设计特点.pdf-synthesizable VHDL design features. Pdf

实现有限域中乘法，输入二个普通二级制数，输出在本原多项式的乘法结果(Achieve limited multiplication field, enter the number of two-tier system of two ordinary output in primitive polynomial multiplication results)

verilog支持noise噪声的端口port, 可以用于仿真运行. 评估噪声影响 Verilog port that supports noise and can be used for simulation run. Evaluate noise effects

一种半加器的算法，是基于VHDL软件仿真。请大家下载参考！-A full-adder algorithm is based on the VHDL software emulation. Please download the reference!