an example HDL

TCM解码，VHDL代码，是我在工作中做的工程代码，时序稳定，里面有syn以及软判决的算法，经典-TCM decoder, VHDL code, yes, I do work in the project code, timing stability, There are syn and soft-decision algorithm, classic!

说明：  使用Verilog，以Quartus II 为平台，编写了一个DDS信号发生器程序。(Using Verilog and Quartus II as the platform, realizing the DDS signal generator program .)

VHDL设计实体的基本结构 VHDL的语言要素 用VHDL实现电路设计的方法 VHDL设计流程-VHDL design entities, the basic structure of the language element of VHDL using VHDL circuit design approach to achieve VHDL design flow

vhdl code for internet interface

键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters

在赛灵思的FPGA上实现turbo码的编码程序,使用Verilog语言实现。(Implemented on Xilinx FPGA in the turbo coding principle, the use of Verilog language.)

各种常用模块的VHDL描叙实例，PDF格式-various modules used VHDL depicts examples, PDF format

适合DE2板，能够在板子上的液晶显示器上实现时钟功能。-for Dictyophora board, in the way of achieving LCD clock function.

有关于SD卡的音频部分！希望对大家有用！-SD cards have on the audio portion! Hope useful for everyone!

VHDL学习手册-VHDL study manual