基于VHDL可编程BPSk调制教学~~~十分好用`~容易学会

EDA 双向端口的输入输出程序 快点来下在啊 -EDA port bi-directional input and output procedures to hurry up in the ah

这是Verilog语言的if else 语句的优化，不同的写法，编译出来，结果会有很多不同。请大家自己斟酌。-see the Chinese

在ＦＰＧＡ中产生的频率可调的锯齿波型信号发生器(The frequency of the FPGA to generate the sawtooth waveform signal generator adjustable)

FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation

说明：  credit base network on chip(network on chip (noc))

Quartus II 7.2最完美的license破解器!(Quartus II 7.2 FULL and perfect License!)

说明：  SJA1000的ip核和相关测试脚本,OPENCORES 下载(SJA1000 IP downloads from opencores)

简单的一个Verilog小程序，适合刚接触的人群(A simple Verilog small program, suitable for people just contact)

基于CS的一维距离像（HRRP）及FFT成像对比(CS-based HRRP and FFT HRRP)

程序主要是用硬件描述语言（VHDL）实现： 4*4键盘扫描，简洁明了，通俗易懂，比较适合VHDL初学者-procedure was used in hardware description language (VHDL) to achieve : 4* 4 keyboard scan, concise, easily understood and more suitable for beginners VHDL