io 组件，用vhdl实现io端口的控制，包括输入输出，握手信号，...

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

filter kalman mppt for PV

FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择 (FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)

VHDL Coding style guide

本实验实现了一个小的乒乓游戏，VGA显示,代码下载的FPGA板子上验证通过，效果很好。(The experimental realization of a small ping-pong game, VGA display, download the code verified by the FPGA board, with good results.)

说明：  1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT

PC104总线的CPLD代码，调试已经通过，可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering 示例用法:)

说明：  串口操作源代码，本代码采用veilog hdl语言编写，并经过本人多次验证。(source code, the code used veilog HDL language, and after I repeatedly verified.)

Demo program for use UART STM8S

一种能简单的实现I2C通讯的代码，对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)