用VHDL语言编程完成数码管0

用verilog 语言实现七人投票表决器(verilog seven voting)

these is about code for dlx processor

这是一个很实用的，很实用的，关于软件的使用，大家可以来看看。-This is a very practical, very practical, with regard to the use of software, everyone can come and see.

cadence verilog lanaguage and simulation course

基于旋转编码器和LED灯组的强度调节系统设计(Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set)

说明：  Quartus II TimeQuest 时序分析器说明书；这本手册包含一组设计场景、约束指南以及相关建议。您应该熟悉 TimeQuest Timing Analyzer 和 Synopsys Design Constraint(SDC) 的基础知识，以便正确地使用这些指南。(Quartus II timequest timing analyzer manual; this manual contains a set of design scenarios, constraint guidelines, and related recommendations. You should be familiar with the basics of timequest timing analyzer and Synopsys design constraint (SDC) to use these guidelines correctly.)

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

做EDA的，就不用介绍这个文件了吧，IEEE1364标准（开放）。-done, would not have introduced the document on the bar, IEEE1364 standard (open).

verilog 键盘输入程序，用于led灯的显示-Verilog keyboard input program for led lights display

异步FIFO 输入: 16bit 输出:16bit 深度:256(Asynchronous FIFO Input: 16bit Output: 16bit Depth: 256)