用VHDL语言编程完成数码管0

ieee paper on power gating and can be use full for implementing on ip core

本系统用于GPS中频部分的窄带滤波（AD后的数据经过LMS滤波后去掉窄带干扰，可以抑制20dB以上的干扰）(this system can be imply to anti-narrowband-jamming for GPS IF signal, it can degrade 20dB narrowband jamming)

Altium Reference design for LMH0340 test bed and design

Based on the verilog such as frequency meter accuracy, except for measuring frequency can also measure pulse width of empty measure than 32 counts of data through the simulation SPI serial output to SCM processing and display

VHDL_ 两个电路计数上 / 下液晶显示语言 VHDL (海 mạch đếm lên/xuống hiển 施耐液晶 bằng ngôn ngữ VHDL)

一个完整的设计DE2_project,希望对大家有所帮助，谢谢ok-A complete design DE2_project, everyone would like to be helpful, thank you ok

SMII 到 MII 转换的VHDL代码-SMII to MII conversion of VHDL code

I2C控制核设计,由VHDL语言编写,使普通I/O端口实现I2C性能-I2C control of nuclear design, VHDL language, I/O ports I2C Performance

无线通信FPGA实现的代码 有matlab和verilog(FPGA implementation of wireless communication code matlab and verilog)

Package include hardware implementation of Lz77 algorithm