I write the digital phase

VHDL与源代码包-and VHDL source code

网卡的IP核，下载即可用，解压到指定目录下就可以了，参照里面的read me.-NIC

FPGA实现DSP的Verilog 示例(FPGA realization of DSP-Verilog Example)

说明：  In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.

四位乘法器的VHDL源程序-four Multiplier VHDL source

verilog jtag源码及原理，还有debug模块。边界扫描等(verilog jtag source and principle, as well as debug module. Boundary-Scan, etc.)

图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写(Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language)

设计含异步清零和同步时钟使能的加法计数器-Clear design with asynchronous and synchronous clock so that the adder counter

一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题-A group of exercises, on a number of VHDL-based knowledge and practice can refer to some specific questions

说明：  利用FPGA实现TMDS接口标准，可用于DVI以及HDMI接口的FPGA实现（含文档）(Video Connectivity Using TMDS I/O in Spartan-3A FPGAs)