doing more of a state machine on the three described earlier. Many more informat...

本设计是基于FPGA的一个FIR低通滤波器设计，要求使用Verilog语言编写滤波器模块，通过编译和综合，并通过Matlab和modelsim联合仿真验证设计结果。(This design is a FIR low-pass filter design based on FPGA, use Verilog to program filter module, and joint simulation by Matlab and modelsim to validate the design results.)

基于FPGA的电子密码锁设计-已在开发板上成功运行，通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)

数码扫描显示转换模块，可以对数码内容进行扫描，同时可进行转换-digital scan conversion modules, the digital content can scan, which can also be converted

改写四号中断的 自己编的，，，，，，求过啊！！！一个很简单的小程序(Rewrite the fourth interruption of their series,,,,,, begged ah! ! ! A very simple little program)

几大代工厂的flash verilog源代码(flash verilog code)

Ethernet Media Access Controller

阿尔法贝塔滤波器，是卡曼滤波器的简化，比卡曼滤波器速度快。这是一个实例。(aplha-beta filter is filter that faster than kalman filter)

说明：  FPGA 点亮数码管的灯，本例程支持6位数码管，因为我的FPGA开发板是这样子的(The lamp of digital tube illuminated by FPGA)

奇数分频-此程序对输入频率sysclk有奇数（X）分频的功能(Odd frequency- this program has an odd number of input frequency sysclk (X) frequency function)

135个经典VerilogHDL源码和说明文档，入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry