基于VHDL的rsc（7,5）递归卷积编码器

I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)

实现扰码的功能，主要为64位在pcs子层传输的扰码器设计(To achieve the functions of scrambling code)

VHDL语言编写的计数器程序，实现1到9999计数，并动态扫描显示，带清零和暂停功能，课上作业自编程序-VHDL language of the counter program to achieve 1-9999 counts, and the dynamic scan showed, with Clear and suspension of functions, classes, on a self-compiled programs

使用两个8点FFT完成64-point FFT(64-point FFT)

VGA图象显示控制器设计,实现在VGA显示器上显示图象.-VGA image display controller designed to achieve the VGA display shows images.

adder_array的设计。加法器阵列设计，顶层模块，四步流水，21位(adder_array the design. The adder array design, top-level module, four-step pipeline, 21)

梁祝音乐verilog code --适用于QUATUS II 开发环境下，适合于verilog入门学员(the verilog code of liangzhu )

VHDL 编写的RAM例子-RAM prepared VHDL example

说明：  介绍USB PHY接口中的UTMI接口， 对使用Verilog进行USB接口编程具有帮助。(This paper introduces UTMI interface in USB PHY interface. It is helpful for programming USB interface with Verilog.)

Verilog实现的VGA程序，用ISE打开工程文件即可-Verilog implementation VGA program, open the project file with the ISE can be