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irig_b
用来实现IRIG_B码的解码程序,在XILINX ISE上运行过没有问题,(Used to achieve IRIG_B code decoding process, in XILINX ISE run-off is no problem,)
- 2021-04-06 14:49:03下载
- 积分:1
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fir_lms
基于FIR滤波器的LMS自适应算法的FPGA实现,verilog语言(FIR filter based on LMS adaptive algorithm on FPGA, VHDL language)
- 2015-10-11 19:23:03下载
- 积分:1
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Snacke
基于NiosII系统的可以在DE2-115板子上运行的吞食蛇游戏!(可以使用RS2键盘进行控制)(DE2-115 board NiosII system swallowed snake game! , (RS2 keyboard control))
- 2013-01-01 10:12:03下载
- 积分:1
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《CPLDFPGA verilog DA0832调控
verilog da0832 cpldfpga control-verilog da0832 cpldfpga control
- 2022-12-07 05:55:03下载
- 积分:1
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PS2
基于FPGA的键盘PS第二类编码方式的verilog解码程序。基于FPGA的键盘PS第二类编码方式的verilog解码程序。(FPGA keyboard PS encoding the verilog decoding procedures. FPGA keyboard PS encoding the verilog decoding procedures.)
- 2013-04-13 20:02:06下载
- 积分:1
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eth_send
清华大学sdr项目,网口代码。Verilog编写。很实用。希望大家喜欢。(Tsinghua University sdr project, network interface code. Verilog preparation. Very practical. Hope you like it.)
- 2010-09-26 14:43:28下载
- 积分:1
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MIPS处理器的组员大作业,可以直接运行,提交,环境是quartus
MIPS处理器的组员大作业,可以直接运行,提交,环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII
- 2023-05-21 22:20:04下载
- 积分:1
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DDSN
quartus II 13.0 DDS工程文件,采用VHDL编写,可输出正交两路正弦信号。可以直接用modelsim-alter 仿真(quartus II 13.0 DDS project file, using VHDL written two orthogonal sinusoidal output signals. Can be simulated directly modelsim-alter)
- 2021-03-20 16:49:17下载
- 积分:1
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基于FPGA的1553B总线编码解码器的设计
基于FPGA的1553B总线编码解码器的设计-1553B Bus FPGA-based codec design
- 2022-02-25 23:58:17下载
- 积分:1
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vhdl
code for fft non synthesisable in xilinx ise
- 2013-09-30 13:16:13下载
- 积分:1