基于CPLD的签到器的设计，用三维数组队人名进行储存

基于FPGA的希尔伯特变化的verilog代码(Hilbert change verilog code)

ecc椭圆算法RTL,verilog源代码经过验证，用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)

modbus的fpga实现。opencores上最新版本。使用fpga实现，可以大大提高响应速度，对其功能进行模块化。(modbus of fpga implementation. opencores the latest version. Use fpga implementation, can greatly improve the response speed, its function modularity.)

多倍（次）分频器 请注意: 本例的各个源描述的编译顺序应该是: 52_divider.vhd 52_divider_stim.vhd-Times (times) divider Please note: This case is described in various sources to compile the order should be: 52_divider.vhd 52_divider_stim.vhd

说明：  VGA图像显示，可实现图片和实现移动功能(VGA image display, enabling images and moving functions to achieve)

Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)

这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)

Xilinx FPGA moving data across asynchronous clock boundaries

Verilog 编写的IP核，512K的16位SRAM-Written in Verilog IP core, 512K 16-bit SRAM

这是一篇现代通信原理课程的作业报告.题目为几种时频分析方法比较及应用.详细介绍了短时傅里叶变换、小波变换、魏格纳—威利分布和Cohen类时频分布这4种典型时频分析方法,并作了比较(This is a modern communication Principle operating report. Entitled Comparison of several time-frequency analysis and 应用. 详细 Jieshao the short time Fourier transform, wavelet transform, Wigner- Willie distribution and frequency distribution of Cohen Lei This four kinds of typical time-frequency analysis method, and compared)