基于CPLD的签到器的设计，用三维数组队人名进行储存

基于FPGA与LM4550B的AC97软声卡VHDL语言驱动，版本2.0-FPGA-based soft and LM4550B the AC97 sound card driver VHDL language, version 2.0

除法器-Divider

在开发板EGO1上实现的直升机飞行游戏，随时间的累积，速度不断加快，数码管显示积分( Helicopter game in verilog)

收集的QuartusII的使用手册，包含了几个pdf文件，比较不错的参考手册-Collected QuartusII s manual contains a number of pdf files, compare a good reference manual

generate sine wave. Inputs : Amplitude, phasein, frequency

该源码可基于FPGA设置多分辨率的HDMI显示，且其包含了完整的时序和端口、地址映射，可以很方便的将其移植(The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted)

EV10AQ190A配置程序 EV10AQ190A configuration program(EV10AQ190A configuration program)

一个简单的FM调制模块，FM发射，用Verilog编写，基于Xilinx SPARTAN6 XC6LX9开发(A simple FM modulation modules for FM transmitter, using Verilog prepared, based on XILINX SPARTAN6 XC6LX9 Development)

动态获取CPU使用率源码 可以加到压力测试里(Dynamic access to CPU use the source code )

binary comparator with register