A simple sequential lights

TASKS OF TWO TYPES CAN BE RUN FOR EVERY 2 MIN.

波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn

步进电机定位控制系统，VHDL程序，里面有注释(Stepper motor position control system, VHDL program, there are comments)

Aurora协议是一款高带宽、低成本、可扩展、框架简洁、适合点对点串行数据传输的协议。(Aurora protocol is a high-bandwidth, low-cost, scalable, simple framework for point to point serial data transfer protocol.)

Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA. Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit! The UART controller was simulated and tested in hardware.

本文提出了降低动态功耗有限 Imppulse 跃 (FIR) 数字滤波器的方法这些方法包括低功耗串行乘法器和串行加法器、 移位/添加的乘数，折叠组合展位乘数线性相位结构的改造和应用对 fir 滤波器，以减少功率引致此干扰的消耗也是减少。最小的功率，实现是在基于 8taps 和 8bits 的投入在 100 MHZ 转变/添加乘数 fir 滤波器的功率为 110mw 和 8bits 系数。拟议的 FIR 滤波器，合成了采用 Xilinx ISE 斯巴达 3E FPGA 和权力分析了使用 Xilinx XPower 分析器。

Design FPGA in Labview

包括很多格式的85基准电路，不需手动转换，可以供学者自行选用。(This resource including many formats 85 banchmack circuit, without manual conversion, you can choose for the scholar.)

主要介绍了ＦＰＧＡ设计的基本原则、基本设计思想、基本操作技巧、常用模块。-Mainly introduces the basic principles of FPGA design, basic design concepts, basic operating skills, commonly used modules.

EDA技术及其应用《序列信号发生器的设计》，包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)