数字频率计

Xilinx Sysgen User Guide

本人初学VHDL时编的比较系统的VHDL源程序 巨实用 -I am learning more systematic series of practical VHDL source Giant

说明：  基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)

CH2 VHDL 数字电路参考书所有程序2-CH2 VHDL digital circuit two reference books all procedures

基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)

高速FIFO，verilog设计。速度高达130Mhz-High-speed FIFO, verilog design. Speed up to 130MHz

数字频率计VHDL程序 --文件名：plj.vhd。 --功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的 --高4位进行动态显示。小数点表示是千位，即KHz。-Digital Cymometer VHDL procedures- File name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for the high dynamic display. Decimal point that is 1000, or KHz.

说明：  altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。(altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.)

Am29LV160D数据基本知识手册，基本原理及工作方式。(Am29LV160D Data basic knowledge Manual, the basic principle and ways of working.)

verilog vga 图像处理(verilog vga)