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北大verilog课件,数字集成电路设计入门,从HDL到版图
北大verilog课件,数字集成电路设计入门,从HDL到版图-North Verilog courseware, digital IC design entry, from HDL to the map
- 2022-07-24 16:14:44下载
- 积分:1
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vhdl,序列信号发生器,发出11101010,可更改为任意序列
vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
- 2023-08-12 03:05:03下载
- 积分:1
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verilog-learning-of-HuaWei
华为公司学习verilog的资料,绝密资料,想学习verilog编程,想学习FPGA,想以后进华为公司的都可以看看。(Huawei learning verilog information, confidential information, want to learn verilog programming, want to learn FPGA, think later into the Huawei can see.)
- 2013-07-23 14:48:30下载
- 积分:1
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四种常用FPGA设计技巧,包括乒乓结构等。
四种常用FPGA设计技巧,包括乒乓结构等。-Four kinds of commonly used FPGA design skills, including ping-pong structure.
- 2022-05-19 22:16:35下载
- 积分:1
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128点 基8 FFT
使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)
- 2018-11-29 14:39:32下载
- 积分:1
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src
说明: 假设每个从设备中有可访问APB寄存器16个,位宽均为32比特,16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移2位(byte 偏移)(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分:1
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SeggerEval_LPC2478
emWin 在LPC2478上实现LCD的高性能显示(emWin to achieve high-performance LCD display in the LPC2478)
- 2012-08-04 13:54:29下载
- 积分:1
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med01-165
median filter details
- 2011-01-30 18:29:06下载
- 积分:1
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bubblesort
根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果,含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)
- 2021-05-08 13:28:35下载
- 积分:1
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Waveform-generation-program
基于VHDL语言的波形发生器编程设计,能够实现常用波形的产生。(Waveform generator design based on VHDL programming, to achieve common waveform generated.)
- 2014-05-05 16:50:23下载
- 积分:1