常用的缩写

实现数字变下频的matlab程序，CIC,HB,FIR滤波器代码都在其中(Realize digital variable frequency under matlab, CIC, HB, FIR filter code in it )

说明：  数字信号处理的FPGA实现(第4版)的配套源码，极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)

用verilog实现的一个2抽头RLS自适应滤波器的代码(A realization with verilog HDL code of a two-tap RLS adaprive fliter )

用于单片机的adc采集实验，经过降噪处理，结果精确(ADC acquisition experiment for single chip computer, after noise reduction processing, the result is accurate)

说明：  这是本人曾经参与的一个DDR controller接口项目，主要是FPGA rtl实现，仅供参考。(This is a DDR controller interface project that I once participated in, mainly implemented by FPGA RTL, for reference only.)

RS码的FPGA实现，verilog语言形式，好参考资料(FPGA realization of RS code, verilog language form, a good reference)

用FPGA实现DDS的原理图，结构清晰，采用总线方式与外部单片机通信-FPGA realization of DDS with the schematic diagram, structural clarity, the use of bus-way communication with the outside Singlechip

AXI4-Lite总线的主从机读写，例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)

包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程(Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project)

VHDL fft 源程序，直接运行就可以，很好的一个程序-VHDL fft source code can be run directly, a very good program