用vhdl描写的通用异步改进dram控制器，经过编译器综合和仿真测试，符合设计要求。...

FPGA中按键弹跳消除模块的研究与应用，原理和例子都非常好-FPGA to eliminate bounce in key research and application modules, principles and examples are very good

sdh帧同步，实现sdh帧搜索，预同步，同步，保护等各态的功能(SDH frame synchronization SDH frame search, pre-sync, synchronization, protection, the function of each state)

说明：  高速宽带数字调制技术的研究，该论文也是非常经典的，希望对大家有帮助(High-speed broadband digital modulation technology, the paper is also very classic, I hope all of you help)

我用的是二进制分频的方法，这种分频方法的分频只能是2n次方，有限制，但是很方便

11阶fir数字滤波器的verilog程序设计，线性相位，系数量化处理(11 order of fir digital filter verilog programming, linear phase, the coefficient quantization)

关于寄存器重命名register reallocation,VHDL-Register on rename register reallocation, VHDL

io 组件，用vhdl实现io端口的控制，包括输入输出，握手信号，-io port VHDL code

FPGA开发,DE2开发板上实现,从SD卡读出MP3文件并播放,(即是开发一个简单的MP3播放器)(FPGA development, DE2 development board realize, from the SD card to read out and play MP3 files, (that is, the development of a simple MP3 player))

A VHDL source code for testing the digits and the switches on a spartan 3 basys board

低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code