登录
首页 » VHDL » Realize with a clock input, can realize multi

Realize with a clock input, can realize multi

于 2023-02-21 发布 文件大小:910.00 B
0 164
下载积分: 2 下载次数: 1

代码说明:

实现同一个时钟输入,可以实现多分频,在一个时钟的驱动下-Realize with a clock input, can realize multi-frequency, in a clock-driven

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • ethernet_udp_ep4c_ok_final
    用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)
    2015-04-27 01:15:36下载
    积分:1
  • srfft_test
    基于分裂基的蝶型FFT,用C实现,经过测试,没有错误,可以直接拿去使用。(Based on the division of FFT butterfly type, use C implementation, tested, no error, can directly use. )
    2016-05-05 22:35:40下载
    积分:1
  • module_dem
    用verilog编写的信号调制解调程序,包括ask,fsk,qpsk的fpga实现(Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation)
    2009-10-14 14:47:30下载
    积分:1
  • vhdl写实用96例子
    用vhdl写实用96例子, 有RAM,PID 等(Using VHDL to write practical examples of 96, there are RAM, PID and so on)
    2017-09-13 14:55:39下载
    积分:1
  • electric-8.08
    The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including: * Custom IC layout * Schematic Capture (digital and analog) * Textual Languages such as VHDL and Verilog (The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:* Custom IC layout* Schematic Capture (digital and analog)* Textual Languages such as VHDL and Verilog)
    2009-01-09 20:01:17下载
    积分:1
  • Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.
    数字频率计VHDL程序与仿真 文件名:plj.vhd。 --功能:频率计。具有4位显示,能自动根据7位十进制计数的结果,自动选择有效数据的 --高4位进行动态显示。小数点表示是千位,即KHz。 -Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for the high dynamic display. Decimal point that is 1000, or KHz.
    2022-08-04 07:22:59下载
    积分:1
  • mc8051内核,VHDL程序,内有说明,超详细.
    mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.
    2022-07-04 05:44:07下载
    积分:1
  • 伪随机二进制序列无符号17位计数器
    这通过反馈来实现一个 17 位伪随机的无符号计数器异或的位 0 和 3。 注意 ︰ 如果也绝不是独家使用相反,这会反相平行的位模式 & 这将意味着所有位都零是一种有效模式和所有那些不都是有效。  目前所有的都是有效的。
    2022-12-08 06:25:03下载
    积分:1
  • High
    高速多通道crc实现,可以并行实现5个通道数据的校验,支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
    2022-07-18 13:13:37下载
    积分:1
  • M_SSB_100
    由乘法器组成 单边带信号产生的 仿真源代码 msm (Composed of single sideband signal by the multiplier generated simulation source code msm)
    2007-07-25 14:59:29下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载