ISP的IP核，下载即可用，解压到指定目录下就可以了，参照里面的read me....

Multipleksor 3 to 1 - 3x1bit in, 1x1bit out

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!-16 CUPIP nuclear, full of good things to run, can be directly used to use!

高速串行设计FPGA-GTX IP设置生成，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接(High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)

USB IPcoreIP核 包含文档(带说明)-USB IPcoreIP core includes a document (with instructions)

说明：  FPGA PLL 分析，包括时序分析等等。。。。。。。。。(FPGA PLL Analysis)

VHDL语言实现的程序，功能如下：在键盘上输入什么，在相应的LCD上显示你输入的字符-VHDL language procedures, functions as follows: What is the keyboard input, in the corresponding LCD display the characters you type

基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)

在matlab仿真的基础上，用maxplus2实现等波纹法的程序代码(In matlab simulation, based on the use of such corrugated maxplus2 realize law code)

这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充(This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded)

模拟示波器的现实程序，有x，y和光标。采用AD5440输出，现实效果很好。（示波器x-y方式）(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))