ISP的IP核，下载即可用，解压到指定目录下就可以了，参照里面的read me....

alu 模块，算术逻辑单元，实现简单的控制模块，有最基本的几条指令-alu instruction

此代码在FPGA使用VHDL了FFT的基本思想。

一个7段的显示器，及按一定顺序循环得到的结果，可重复使用(A 7-segment display, and by a certain sequence and cycle the results obtained can be reused)

用VHDL语言写的代码 包括全局的输入时钟缓冲器来去抖动，块RAM模块65536*10，读数据，写数据，空标志信号的产生，满标志信号的产生，读写使能信号的产生七个模块！对各位有帮助噢！

说明：  实现AD9117芯片的配置功能，这是一款DAC芯片(Realize the configuration function of ad9117 chip, which is a DAC chip)

说明：  用VERILOG实现的，hdb3编码器和解码器，经过前仿真和后仿真成功(Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation)

说明：  fpga设计常用资料大全，包含常用的FPGA程序资料，对FPGA学习者有很大的帮助。(Encyclopedia of common information fpga design, FPGA that contains commonly used procedures for information on the FPGA is very useful to learners.)

用FPGA于32进行SPI单向通信，FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)

用双端口ram实现异步fifo，采用格雷码，避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.

1024点快速傅里叶变换，使用verilog hdl硬件描述语言(1024point FFT，using verilog hdl)