8051core

当年本科时的毕业设计，信号发生器和频率计-The time of the year undergraduate graduate design, signal generator and frequency counter

IIC slave controller source code

数字信号源，输出不同频率，相位的正余弦信号，-Digital signal source, the output of different frequency, phase is the cosine signal,

PS2的源代码VHDL语言实现，可以和计算机直接连接．做鼠标键盘接口．-PS2 source VHDL, and can be connected directly to the computer. So the mouse, keyboard interface.

gps C/A码生成 生成gps32颗卫星伪码，方便，经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)

viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use

In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.

数字频率计 FPGA 用verilog语言编写-Digital Cymometer verilog language used FPGA

说明：  本光盘是《数字信号处理FPGA实现》一书的配书光盘，内容包括了书中第二章给出的所有示例以及该书的12个实验完整的工程文件。 本光盘根目录下有3个文件夹，分别为dsp48_application,dsp48e_application和DSP_Example。(This CD-ROM is the CD-ROM of the book "FPGA implementation of digital signal processing". It includes all the examples given in Chapter 2 and the complete engineering documents of 12 experiments in the book. There are three folders in the root directory of this CD-ROM, which are dsp48_ application,dsp48e_ Application and DSP_ Example.)

these are verilog files but i am uploading in text(notepad) format