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disptest
模拟示波器的现实程序,有x,y和光标。采用AD5440输出,现实效果很好。(示波器x-y方式)(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))
- 2013-09-13 23:18:19下载
- 积分:1
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8B10B
以太网PHY层中的组成部分 8B10B编码器(Part of the Ethernet PHY layer in 8B10B encoder
)
- 2021-01-27 09:18:42下载
- 积分:1
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flv的vhdl教学文件:在线调试
自己慢慢欣赏吧
flv的vhdl教学文件:在线调试
自己慢慢欣赏吧-flv file of VHDL Teaching: Online debug their慢慢欣赏吧
- 2022-05-22 02:55:52下载
- 积分:1
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Xilinx_AXI
说明: AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream
- 2020-04-21 01:18:30下载
- 积分:1
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ds18b20Plcd
温度控制系统.运用ds18b20温度传感器将实时温度送入FPGA中,再将温度显示出来(Temperature control systems. Use ds18b20 temperature sensor into the FPGA in real-time temperature, then the temperature is displayed)
- 2014-04-27 18:39:30下载
- 积分:1
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Testsystem for i2c controller
-- State machine for reading data from Dallas 1621
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-- Testsystem for i2c controller--- State machine for reading data from Dall as 1621---- Testsystem for i2c controller
- 2022-06-17 11:26:02下载
- 积分:1
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串uart的vhdl,verilog,lattic实现原码
里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Veri...
串uart的vhdl,verilog,lattic实现原码
里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Verilog)uart 源码 (VHDL)uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) uart source (Verilog) uart source (VHDL) uart16550.tar
- 2022-04-12 23:45:53下载
- 积分:1
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vhdl training
Five day stmicroelectornics vhdl training presentation
- 2018-08-14 21:51:58下载
- 积分:1
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ahb_slave_latest.tar
AHB 总线slave verilog实现(Implementation of AHB bus)
- 2020-06-30 13:40:02下载
- 积分:1
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USB IPcoreIP核 包含文档(带说明)
USB IPcoreIP核 包含文档(带说明)-USB IPcoreIP core includes a document (with instructions)
- 2022-02-18 17:02:37下载
- 积分:1