flv的vhdl教学文件:在线调试 自己慢慢欣赏吧

mux one hwich is teh best knwo progerma i n the workdl and ist is the

A ROM to build a squaring circuit

用fpga实现SDI，每一步都很清楚 搞视频的可以参考(Fpga realization of SDI, each step are clearly engaged in the video can refer to)

I2C控制器的源代码，Verilog HDL语言编写，可以直接调用-I2C controller source code, Verilog HDL language, you can directly call

《Verilog HDL 程序设计教程》9("Verilog HDL Design Guide" 9)

说明：  vhdl code for full adder

spartan-3e vhdl fpga 输入用滑动按钮代替 输出用led代替(spartan-3e VHDL fpga input with sliding button instead of the output with led instead)

说明：  ask psk 编码调制的vhdl 实现(ask psk coded modulation to achieve the VHDL)

rebuild file in check for

针对32位MIPS微处理器中CLZ指令（对单个字高位连零进行计数）的实现电路，使用了类似于超前进位的逻辑结构。包含测试文档，以及Design Compile所用的环境和脚本。(The CLZ instruction counts the number of leading zeros in a word. The 32-bit word in the GPR rs is scanned from most-significant to least-significant bit.The number of leading zeros is counted and the result is written to the GPR rd. If all 32 bits are cleared in the GPR rs, the result written to the GPR rd is 32. )