Verilog语言编写的电话计费系统，这只是源代码，需要在quartusII等软件下运用...

海德汉绝对式编码器代码，VHDL语言编写(Heidenhain absolute encoder code, VHDL language)

说明：  学习VHDL可以用得上，有很多实例，可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)

用Verlog HDL编写的数字钟程序，包含时，分，秒，进位，解码，扫描显示等功能。-Written by Verlog HDL ，a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.

costas载波恢复算法 锁相环路，注释很清楚(costas carrier recovery algorithm PLL)

VHDL语言写的频率计的程序，内带完整的技术报告-VHDL write the frequency of procedures, brought integrity of the technical report

三相PWM整流，实现功率双向流动,可保持直流侧电压稳定(three-phase PWM rectifier, power can bidirectional flow ，can maintain the stable DC voltage)

have a good documenty

Actel双端口存储；通过串口发送数据初始化RAM，然后通过串口返回到上位机的串口调试程序显示(通过串口发送数据初始化RAM，然后通过串口返回到上位机的串口调试程序显示)

最新的ATA-六总线协议源代码参考，实现DMA,PIO模式，可挂CDROM,IDE硬盘，CF卡．-the latest ATA-6 bus protocol source code reference, achieving DMA, PIO Mode, can be linked to CDROM, IDE hard drive, CF card.

应用VHDL语言将高稳晶振分频得到1pps，使用GPS的1pps信号作为触发-Application of VHDL language high stability crystal oscillator frequency to be 1pps, the use of GPS signals as a trigger of 1pps